Driver

Now let’s use the new Registers struct in our driver.

  1. /// Driver for a PL011 UART.
  2. #[derive(Debug)]
  3. pub struct Uart {
  4.     registers: *mut Registers,
  5. }
  7. impl Uart {
  8.     /// Constructs a new instance of the UART driver for a PL011 device at the
  9.     /// given base address.
  10.     ///
  11.     /// # Safety
  12.     ///
  13.     /// The given base address must point to the 8 MMIO control registers of a
  14.     /// PL011 device, which must be mapped into the address space of the process
  15.     /// as device memory and not have any other aliases.
  16.     pub unsafe fn new(base_address: *mut u32) -> Self {
  17.         Self { registers: base_address as *mut Registers }
  18.     }
  20.     /// Writes a single byte to the UART.
  21.     pub fn write_byte(&self, byte: u8) {
  22.         // Wait until there is room in the TX buffer.
  23.         while self.read_flag_register().contains(Flags::TXFF) {}
  25.         // SAFETY: We know that self.registers points to the control registers
  26.         // of a PL011 device which is appropriately mapped.
  27.         unsafe {
  28.             // Write to the TX buffer.
  29.             (&raw mut (*self.registers).dr).write_volatile(byte.into());
  30.         }
  32.         // Wait until the UART is no longer busy.
  33.         while self.read_flag_register().contains(Flags::BUSY) {}
  34.     }
  36.     /// Reads and returns a pending byte, or `None` if nothing has been
  37.     /// received.
  38.     pub fn read_byte(&self) -> Option<u8> {
  39.         if self.read_flag_register().contains(Flags::RXFE) {
  40.             None
  41.         } else {
  42.             // SAFETY: We know that self.registers points to the control
  43.             // registers of a PL011 device which is appropriately mapped.
  44.             let data = unsafe { (&raw const (*self.registers).dr).read_volatile() };
  45.             // TODO: Check for error conditions in bits 8-11.
  46.             Some(data as u8)
  47.         }
  48.     }
  50.     fn read_flag_register(&self) -> Flags {
  51.         // SAFETY: We know that self.registers points to the control registers
  52.         // of a PL011 device which is appropriately mapped.
  53.         unsafe { (&raw const (*self.registers).fr).read_volatile() }
  54.     }
  55. }
  • Note the use of &raw const / &raw mut to get pointers to individual fields without creating an intermediate reference, which would be unsound.