ESIL

ESIL stands for ‘Evaluable Strings Intermediate Language’. It aims to describe a Forth-like representation for every target CPU opcode semantics. ESIL representations can be evaluated (interpreted) in order to emulate individual instructions. Each command of an ESIL expression is separated by a comma. Its virtual machine can be described as this:

  1. while ((word=haveCommand())) {
  2. if (word.isOperator()) {
  3. esilOperators[word](esil);
  4. } else {
  5. esil.push (word);
  6. }
  7. nextCommand();
  8. }

As we can see ESIL uses a stack-based interpreter similar to what is commonly used for calculators. You have two categories of inputs: values and operators. A value simply gets pushed on the stack, an operator then pops values (its arguments if you will) off the stack, performs its operation and pushes its results (if any) back on. We can think of ESIL as a post-fix notation of the operations we want to do.

So let’s see an example:

  1. 4,esp,-=,ebp,esp,=[4]

Can you guess what this is? If we take this post-fix notation and transform it back to in-fix we get

  1. esp -= 4
  2. 4bytes(dword) [esp] = ebp

We can see that this corresponds to the x86 instruction push ebp! Isn’t that cool? The aim is to be able to express most of the common operations performed by CPUs, like binary arithmetic operations, memory loads and stores, processing syscalls. This way if we can transform the instructions to ESIL we can see what a program does while it is running even for the most cryptic architectures you definitely don’t have a device to debug on for.

Using ESIL

r2’s visual mode is great to inspect the ESIL evaluations.

There are 3 environment variables that are important for watching what a program does:

  1. [0x00000000]> e emu.str = true

asm.emu tells r2 if you want ESIL information to be displayed. If it is set to true, you will see comments appear to the right of your disassembly that tell you how the contents of registers and memory addresses are changed by the current instruction. For example, if you have an instruction that subtracts a value from a register it tells you what the value was before and what it becomes after. This is super useful so you don’t have to sit there yourself and track which value goes where.

One problem with this is that it is a lot of information to take in at once and sometimes you simply don’t need it. r2 has a nice compromise for this. That is what the emu.str variable is for (asm.emustr on <= 2.2). Instead of this super verbose output with every register value, this only adds really useful information to the output, e.g., strings that are found at addresses a program uses or whether a jump is likely to be taken or not.

The third important variable is asm.esil. This switches your disassembly to no longer show you the actual disassembled instructions, but instead now shows you corresponding ESIL expressions that describe what the instruction does. So if you want to take a look at how instructions are expressed in ESIL simply set “asm.esil” to true.

  1. [0x00000000]> e asm.esil = true

In visual mode you can also toggle this by simply typing O.

ESIL Commands

  • “ae” : Evaluate ESIL expression.
  1. [0x00000000]> "ae 1,1,+"
  2. 0x2
  3. [0x00000000]>
  • “aes” : ESIL Step.
  1. [0x00000000]> aes
  2. [0x00000000]>10aes
  • “aeso” : ESIL Step Over.
  1. [0x00000000]> aeso
  2. [0x00000000]>10aeso
  • “aesu” : ESIL Step Until.
  1. [0x00001000]> aesu 0x1035
  2. ADDR BREAK
  3. [0x00001019]>
  • “ar” : Show/modify ESIL registry.
  1. [0x00001ec7]> ar r_00 = 0x1035
  2. [0x00001ec7]> ar r_00
  3. 0x00001035
  4. [0x00001019]>

ESIL Instruction Set

Here is the complete instruction set used by the ESIL VM:

ESIL OpcodeOperandsNameOperationexample
TRAPsrcTrapTrap signal
$srcInterruptinterrupt0x80,$
()srcSyscallsyscallrax,()
$$srcInstruction addressGet address of current instruction
stack=instruction address
==src,dstComparestack = (dst == src) ;
update_eflags(dst - src)
<src,dstSmaller (signed comparison)stack = (dst < src) ;
update_eflags(dst - src)
[0x0000000]> “ae 1,5,<”
0x0
> “ae 5,5”
0x0”
<=src,dstSmaller or Equal (signed comparison)stack = (dst <= src) ;
update_eflags(dst - src)
[0x0000000]> “ae 1,5,<”
0x0
> “ae 5,5”
0x1”
>src,dstBigger (signed comparison)stack = (dst > src) ;
update_eflags(dst - src)
> “ae 1,5,>”
0x1
> “ae 5,5,>”
0x0
>=src,dstBigger or Equal (signed comparison)stack = (dst >= src) ;
update_eflags(dst - src)
> “ae 1,5,>=”
0x1
> “ae 5,5,>=”
0x1
<<src,dstShift Leftstack = dst << src> “ae 1,1,<<”
0x2
> “ae 2,1,<<”
0x4
>>src,dstShift Rightstack = dst >> src> “ae 1,4,>>”
0x2
> “ae 2,4,>>”
0x1
<<<src,dstRotate Leftstack=dst ROL src> “ae 31,1,<<<”
0x80000000
> “ae 32,1,<<<”
0x1
>>>src,dstRotate Rightstack=dst ROR src> “ae 1,1,>>>”
0x80000000
> “ae 32,1,>>>”
0x1
&src,dstANDstack = dst & src> “ae 1,1,&”
0x1
> “ae 1,0,&”
0x0
> “ae 0,1,&”
0x0
> “ae 0,0,&”
0x0
|src,dstORstack = dst | src> “ae 1,1,|”
0x1
> “ae 1,0,|”
0x1
> “ae 0,1,|”
0x1
> “ae 0,0,|”
0x0
^src,dstXORstack = dst ^src> “ae 1,1,^”
0x0
> “ae 1,0,^”
0x1
> “ae 0,1,^”
0x1
> “ae 0,0,^”
0x0
+src,dstADDstack = dst + src> “ae 3,4,+”
0x7
> “ae 5,5,+”
0xa
-src,dstSUBstack = dst - src> “ae 3,4,-“
0x1
> “ae 5,5,-“
0x0
> “ae 4,3,-“
0xffffffffffffffff
src,dstMULstack = dst src> “ae 3,4,
0xc
> “ae 5,5,

0x19
/src,dstDIVstack = dst / src> “ae 2,4,/“
0x2
> “ae 5,5,/“
0x1
> “ae 5,9,/“
0x1
%src,dstMODstack = dst % src> “ae 2,4,%”
0x0
> “ae 5,5,%”
0x0
> “ae 5,9,%”
0x4
~bits,srcSIGNEXTstack = src sign extended> “ae 8,0x80,~”
0xffffffffffffff80
~/src,dstSIGNED DIVstack = dst / src (signed)> “ae 2,-4,~/“
0xfffffffffffffffe
~%src,dstSIGNED MODstack = dst % src (signed)> “ae 2,-5,~%”
0xffffffffffffffff
!srcNEGstack = !!!src> “ae 1,!”
0x0
> “ae 4,!”
0x0
> “ae 0,!”
0x1
++srcINCstack = src++> ar r_00=0;ar r_00
0x00000000
> “ae r_00,++”
0x1
> ar r_00
0x00000000
> “ae 1,++”
0x2
srcDECstack = src—> ar r_00=5;ar r_00
0x00000005
> “ae r_00,—“
0x4
> ar r_00
0x00000005
> “ae 5,—“
0x4
=src,regEQUreg = src> “ae 3,r_00,=”
> aer r_00
0x00000003
> “ae r_00,r_01,=”
> aer r_01
0x00000003
:=src,regweak EQUreg = src without side effects> “ae 3,r_00,:=”
> aer r_00
0x00000003
> “ae r_00,r_01,:=”
> aer r_01
0x00000003
+=src,regADD eqreg = reg + src> ar r_01=5;ar r_00=0;ar r_00
0x00000000
> “ae r_01,r_00,+=”
> ar r_00
0x00000005
> “ae 5,r_00,+=”
> ar r_00
0x0000000a
-=src,regSUB eqreg = reg - src> “ae r_01,r_00,-=”
> ar r_00
0x00000004
> “ae 3,r_00,-=”
> ar r_00
0x00000001
=src,regMUL eqreg = reg src> ar r_01=3;ar r_00=5;ar r_00
0x00000005
> “ae r_01,r_00,=”
> ar r_00
0x0000000f
> “ae 2,r_00,
=”
> ar r_00
0x0000001e
/=src,regDIV eqreg = reg / src> ar r_01=3;ar r_00=6;ar r_00
0x00000006
> “ae r_01,r_00,/=”
> ar r_00
0x00000002
> “ae 1,r_00,/=”
> ar r_00
0x00000002
%=src,regMOD eqreg = reg % src> ar r_01=3;ar r_00=7;ar r_00
0x00000007
> “ae r_01,r_00,%=”
> ar r_00
0x00000001
> ar r_00=9;ar r_00
0x00000009
> “ae 5,r_00,%=”
> ar r_00
0x00000004
<<=src,regShift Left eqreg = reg << src> ar r_00=1;ar r_01=1;ar r_01
0x00000001
> “ae r_00,r_01,<<=”
> ar r_01
0x00000002
> “ae 2,r_01,<<=”
> ar r_01
0x00000008
>>=src,regShift Right eqreg = reg << src> ar r_00=1;ar r_01=8;ar r_01
0x00000008
> “ae r_00,r_01,>>=”
> ar r_01
0x00000004
> “ae 2,r_01,>>=”
> ar r_01
0x00000001
&=src,regAND eqreg = reg & src> ar r_00=2;ar r_01=6;ar r_01
0x00000006
> “ae r_00,r_01,&=”
> ar r_01
0x00000002
> “ae 2,r_01,&=”
> ar r_01
0x00000002
> “ae 1,r_01,&=”
> ar r_01
0x00000000
|=src,regOR eqreg = reg | src> ar r_00=2;ar r_01=1;ar r_01
0x00000001
> “ae r_00,r_01,|=”
> ar r_01
0x00000003
> “ae 4,r_01,|=”
> ar r_01
0x00000007
^=src,regXOR eqreg = reg ^ src> ar r_00=2;ar r_01=0xab;ar r_01
0x000000ab
> “ae r_00,r_01,^=”
> ar r_01
0x000000a9
> “ae 2,r_01,^=”
> ar r_01
0x000000ab
++=regINC eqreg = reg + 1> ar r_00=4;ar r_00
0x00000004
> “ae r_00,++=”
> ar r_00
0x00000005
—=regDEC eqreg = reg - 1> ar r_00=4;ar r_00
0x00000004
> “ae r_00,—=”
> ar r_00
0x00000003
!=regNOT eqreg = !reg> ar r_00=4;ar r_00
0x00000004
> “ae r_00,!=”
> ar r_00
0x00000000
> “ae r_00,!=”
> ar r_00
0x00000001
—-—-—-—-———————————————————————
=[]
=[]
=[1]
=[2]
=[4]
=[8]
src,dstpokedst=src
> “ae 0xdeadbeef,0x10000,=[4],”

> pxw 4@0x10000
0x00010000 0xdeadbeef ….

> “ae 0x0,0x10000,=[4],”

> pxw 4@0x10000
0x00010000 0x00000000
[]
[]
[1]
[2]
[4]
[8]
srcpeekstack=src
> w test@0x10000

> “ae 0x10000,[4],”
0x74736574

> ar r_00=0x10000

> “ae r_00,[4],”
0x74736574
|=[]
|=[1]
|=[2]
|=[4]
|=[8]
regnombrecode>
>
SWAPSwapSwap two top elementsSWAP
DUPDuplicateDuplicate top element in stackDUP
NUMNumericIf top element is a reference
(register name, label, etc),
dereference it and push its real value
NUM
CLEARClearClear stackCLEAR
BREAKBreakStops ESIL emulationBREAK
GOTOnGotoJumps to Nth ESIL wordGOTO 5
TODOTo DoStops execution
(reason: ESIL expression not completed)
TODO

ESIL Flags

ESIL VM provides by default a set of helper operations for calculating flags. They fulfill their purpose by comparing the old and the new value of the dst operand of the last performed eq-operation. On every eq-operation (e.g. =) ESIL saves the old and new value of the dst operand. Note, that there also exist weak eq operations (e.g. :=), which do not affect flag operations. The == operation affects flag operations, despite not being an eq operation. Flag operations are prefixed with $ character.

  1. z - zero flag, only set if the result of an operation is 0
  2. b - borrow, this requires to specify from which bit (example: 4,$b - checks if borrow from bit 4)
  3. c - carry, same like above (example: 7,$c - checks if carry from bit 7)
  4. o - overflow
  5. p - parity
  6. r - regsize ( asm.bits/8 )
  7. s - sign
  8. ds - delay slot state
  9. jt - jump target
  10. js - jump target set

Syntax and Commands

A target opcode is translated into a comma separated list of ESIL expressions.

  1. xor eax, eax -> 0,eax,=,1,zf,=

Memory access is defined by brackets operation:

  1. mov eax, [0x80480] -> 0x80480,[],eax,=

Default operand size is determined by size of operation destination.

  1. movb $0, 0x80480 -> 0,0x80480,=[1]

The ? operator uses the value of its argument to decide whether to evaluate the expression in curly braces.

  1. Is the value zero? -> Skip it.
  2. Is the value non-zero? -> Evaluate it.
  1. cmp eax, 123 -> 123,eax,==,$z,zf,=
  2. jz eax -> zf,?{,eax,eip,=,}

If you want to run several expressions under a conditional, put them in curly braces:

  1. zf,?{,eip,esp,=[],eax,eip,=,$r,esp,-=,}

Whitespaces, newlines and other chars are ignored. So the first thing when processing a ESIL program is to remove spaces:

  1. esil = r_str_replace (esil, " ", "", R_TRUE);

Syscalls need special treatment. They are indicated by ‘$’ at the beginning of an expression. You can pass an optional numeric value to specify a number of syscall. An ESIL emulator must handle syscalls. See (r_esil_syscall).

Arguments Order for Non-associative Operations

As discussed on IRC, the current implementation works like this:

  1. a,b,- b - a
  2. a,b,/= b /= a

This approach is more readable, but it is less stack-friendly.

Special Instructions

NOPs are represented as empty strings. As it was said previously, interrupts are marked by ‘$’ command. For example, ‘0x80,$’. It delegates emulation from the ESIL machine to a callback which implements interrupt handler for a specific OS/kernel/platform.

Traps are implemented with the TRAP command. They are used to throw exceptions for invalid instructions, division by zero, memory read error, or any other needed by specific architectures.

Quick Analysis

Here is a list of some quick checks to retrieve information from an ESIL string. Relevant information will be probably found in the first expression of the list.

  1. indexOf('[') -> have memory references
  2. indexOf("=[") -> write in memory
  3. indexOf("pc,=") -> modifies program counter (branch, jump, call)
  4. indexOf("sp,=") -> modifies the stack (what if we found sp+= or sp-=?)
  5. indexOf("=") -> retrieve src and dst
  6. indexOf(":") -> unknown esil, raw opcode ahead
  7. indexOf("$") -> accesses internal esil vm flags ex: $z
  8. indexOf("$") -> syscall ex: 1,$
  9. indexOf("TRAP") -> can trap
  10. indexOf('++') -> has iterator
  11. indexOf('--') -> count to zero
  12. indexOf("?{") -> conditional
  13. equalsTo("") -> empty string, aka nop (wrong, if we append pc+=x)

Common operations:

  • Check dstreg
  • Check srcreg
  • Get destinaion
  • Is jump
  • Is conditional
  • Evaluate
  • Is syscall

CPU Flags

CPU flags are usually defined as single bit registers in the RReg profile. They are sometimes found under the ‘flg’ register type.

Variables

Properties of the VM variables:

  1. They have no predefined bit width. This way it should be easy to extend them to 128, 256 and 512 bits later, e.g. for MMX, SSE, AVX, Neon SIMD.

  2. There can be unbound number of variables. It is done for SSA-form compatibility.

  3. Register names have no specific syntax. They are just strings.

  4. Numbers can be specified in any base supported by RNum (dec, hex, oct, binary …).

  5. Each ESIL backend should have an associated RReg profile to describe the ESIL register specs.

Bit Arrays

What to do with them? What about bit arithmetics if use variables instead of registers?

Arithmetics

  1. ADD (“+”)
  2. MUL (“*“)
  3. SUB (“-“)
  4. DIV (“/“)
  5. MOD (“%”)

Bit Arithmetics

  1. AND “&”
  2. OR “|”
  3. XOR “^”
  4. SHL “<<”
  5. SHR “>>”
  6. ROL “<<<”
  7. ROR “>>>”
  8. NEG “!”

Floating Point Unit Support

At the moment of this writing, ESIL does not yet support FPU. But you can implement support for unsupported instructions using r2pipe. Eventually we will get proper support for multimedia and floating point.

Handling x86 REP Prefix in ESIL

ESIL specifies that the parsing control-flow commands must be uppercase. Bear in mind that some architectures have uppercase register names. The corresponding register profile should take care not to reuse any of the following:

  1. 3,SKIP - skip N instructions. used to make relative forward GOTOs
  2. 3,GOTO - goto instruction 3
  3. LOOP - alias for 0,GOTO
  4. BREAK - stop evaluating the expression
  5. STACK - dump stack contents to screen
  6. CLEAR - clear stack

Usage Example:

rep cmpsb

  1. cx,!,?{,BREAK,},esi,[1],edi,[1],==,?{,BREAK,},esi,++,edi,++,cx,--,0,GOTO

Unimplemented/Unhandled Instructions

Those are expressed with the ‘TODO’ command. They act as a ‘BREAK’, but displays a warning message describing that an instruction is not implemented and will not be emulated. For example:

  1. fmulp ST(1), ST(0) => TODO,fmulp ST(1),ST(0)

ESIL Disassembly Example:

  1. [0x1000010f8]> e asm.esil=true
  2. [0x1000010f8]> pd $r @ entry0
  3. 0x1000010f8 55 8,rsp,-=,rbp,rsp,=[8]
  4. 0x1000010f9 4889e5 rsp,rbp,=
  5. 0x1000010fc 4883c768 104,rdi,+=
  6. 0x100001100 4883c668 104,rsi,+=
  7. 0x100001104 5d rsp,[8],rbp,=,8,rsp,+=
  8. 0x100001105 e950350000 0x465a,rip,= ;[1]
  9. 0x10000110a 55 8,rsp,-=,rbp,rsp,=[8]
  10. 0x10000110b 4889e5 rsp,rbp,=
  11. 0x10000110e 488d4668 rsi,104,+,rax,=
  12. 0x100001112 488d7768 rdi,104,+,rsi,=
  13. 0x100001116 4889c7 rax,rdi,=
  14. 0x100001119 5d rsp,[8],rbp,=,8,rsp,+=
  15. 0x10000111a e93b350000 0x465a,rip,= ;[1]
  16. 0x10000111f 55 8,rsp,-=,rbp,rsp,=[8]
  17. 0x100001120 4889e5 rsp,rbp,=
  18. 0x100001123 488b4f60 rdi,96,+,[8],rcx,=
  19. 0x100001127 4c8b4130 rcx,48,+,[8],r8,=
  20. 0x10000112b 488b5660 rsi,96,+,[8],rdx,=
  21. 0x10000112f b801000000 1,eax,=
  22. 0x100001134 4c394230 rdx,48,+,[8],r8,==,cz,?=
  23. 0x100001138 7f1a sf,of,!,^,zf,!,&,?{,0x1154,rip,=,} ;[2]
  24. 0x10000113a 7d07 of,!,sf,^,?{,0x1143,rip,} ;[3]
  25. 0x10000113c b8ffffffff 0xffffffff,eax,= ; 0xffffffff
  26. 0x100001141 eb11 0x1154,rip,= ;[2]
  27. 0x100001143 488b4938 rcx,56,+,[8],rcx,=
  28. 0x100001147 48394a38 rdx,56,+,[8],rcx,==,cz,?=

Introspection

To ease ESIL parsing we should have a way to express introspection expressions to extract the data that we want. For example, we may want to get the target address of a jump. The parser for ESIL expressions should offer an API to make it possible to extract information by analyzing the expressions easily.

  1. > ao~esil,opcode
  2. opcode: jmp 0x10000465a
  3. esil: 0x10000465a,rip,=

We need a way to retrieve the numeric value of ‘rip’. This is a very simple example, but there are more complex, like conditional ones. We need expressions to be able to get:

  • opcode type
  • destination of a jump
  • condition depends on
  • all regs modified (write)
  • all regs accessed (read)

API HOOKS

It is important for emulation to be able to setup hooks in the parser, so we can extend it to implement analysis without having to change it again and again. That is, every time an operation is about to be executed, a user hook is called. It can be used for example to determine if RIP is going to change, or if the instruction updates the stack. Later, we can split that callback into several ones to have an event-based analysis API that may be extended in JavaScript like this:

  1. esil.on('regset', function(){..
  2. esil.on('syscall', function(){esil.regset('rip'

For the API, see the functions hook_flag_read(), hook_execute() and hook_mem_read(). A callback should return true or 1 if you want to override the action that it takes. For example, to deny memory reads in a region, or voiding memory writes, effectively making it read-only. Return false or 0 if you want to trace ESIL expression parsing.

Other operations require bindings to external functionalities to work. In this case, r_ref and r_io. This must be defined when initializing the ESIL VM.

  • Io Get/Set

    1. Out ax, 44
    2. 44,ax,:ou
  • Selectors (cs,ds,gs…)

    1. Mov eax, ds:[ebp+8]
    2. Ebp,8,+,:ds,eax,=